EDN is reporting that TI has improved floating-point arithmetic performance in the the C6722, C6726, and C6727:
The processor-core enhancements include adding floating-point addition to the S unit on each side of the C67x core, so that the processor can execute four floating-point additions per cycle. This doubling of the number of parallel floating-point additions per cycle can boost FFT processing by 20%. In addition to supporting single- and double-precision floating-point operations, the processor core now supports mixed-mode floating-point functions that allow developers to operate on both a single- and double-precision value in the same operation. The C672x DSPs also have twice as many internal registers as C67x DSPs to improve compiler optimizations and reduce the overall number of memory accesses.